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Efficiency · Architecture

FlashAttention-4

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First page
FlashAttention-4
The curator’s take

FlashAttention-4 co-designs algorithms and kernel pipelines for the B200 and GB200 GPUs, which exhibit fundamentally different performance characteristics due to asymmetric hardware scaling where tensor core throughput doubles while other functional units scale more slowly.

Key points
01

Significant speedups on Blackwell: FlashAttention-4 achieves up to 1.3x speedup over cuDNN 9.13 and 2.7x over Triton on B200 GPUs with BF16, reaching up to 1613 TFLOPs/s at 71% hardware utilization. These gains come from careful co-design rather than algorithmic changes alone.

02

Asymmetric scaling solutions: The techniques include redesigned pipelines that exploit fully asynchronous matrix multiply operations and larger tile sizes, software-emulated exponential and conditional softmax rescaling, and leveraging tensor memory to reduce shared memory traffic.

03

Python-native implementation: The entire system is implemented in CuTe-DSL embedded in Python, achieving 20-30x faster compile times compared to traditional C++ template-based approaches while maintaining full expressivity. This dramatically lowers the barrier to kernel development.

04

Hardware-algorithm co-design: The paper demonstrates that next-generation GPU architectures demand fundamentally new attention kernel designs rather than incremental optimizations of existing ones. Techniques that worked well on Hopper GPUs leave significant performance on the table on Blackwell.

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